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• A projection file can be download at the end of this page introducing all things about our project

All we need is 4 I²C interface registers surrounding 16-bit ALU, two of them are ALU input, one ALU output, and last one for ALU control signals. These registers are as slave.

Mechanism is by I²C master write-in operand registers and control signal register, them ALU will calculate for result, finally we can read them from result register.

Following diagram show how SDA transfer data, R/W not: when bit=0 write bit=1 read.

Because all of nodes on transmission line must be able to read and write data, thus in order to ensure the completeness of the data, we use And-Wired method to write data in, that is, all nodes can write data into transmission line simultaneously, and the data being write is the result of running AND to all inputs. EX：Assume 4 slave node ABCD, output a_out、b_out、c_out、d_out to SDA, the data on SDA will be (a_out AND b_out AND c_out AND d_out), when A is sending data b_out and c_out and d_out will be 1, so data on SDA will be the same as a_out. SCL is similar to this, just because SCL is being controled by master, so all slaves output 1 continuously. By this method we can reduce the required transmission line.

At the beginning all slave node is assign one register address(This signal is not gived by master，In I2C_ALU.vhd we can see input1、input2、control、result are all used to send register address, so they are only 7 bits。This signal can be controlled by chips or other controller surrounding, if we want to change I/O's register saved by ALU, we just need to modify this signal, and then tell the master.), when master is going to read/write registers, they connect the start bit and the register address and R/W bit (can refer to diagram above.), all slaves will receive the data send by master, and they will compare to their own register address, if match, they send ACK bit to master to indicate they have receive information, and decide to read/write according to R/W bit, also doing transmission of next byte, until master send a stop bit but not ACK bit.

2 entities SlaveIn and SlaveOut (both in the VHDL file of same name) will handle ALU's input and output, let register send to ALU to run arithmetic by I2C, and than again send to result register by I2C. Control input is also handled by a SlaveIn entity. In a short word, we write slaveIn and slaveOut as to use ALU in a black box manner, and assemble a I2C interface to it.

 

to download projection file (powerpoint format)